UMC Sync Cache Module 256KB (Pyplyn Burst Cache, KUS)

Gepos deur DeviceLog.com | gepos in SRAM | gepos op 2013-01-05

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UMC Sync Cache Module 256KB Frontside (Pipeline Burst Cache)

UMC Sync Cache Module 256KB Backside (Pipeline Burst Cache)

Baie hoofborde, ondersteun vroeë pentium CPU, het gewoonlik sinchronisasiekasgeheueskyfies as CPU L2-kas gehad. Hierdie sinchroniseer kasmodule(KUS; Kas Op 'n Stok) is eksterne geheue module wat gebruik word as addisionele CPU L2 kas. Dit maksimeer die werkverrigting van die verwerker terwyl die verwerker vir instruksies of data wag. L2 cache is used for operating closer to the theoretical limit of the microprocessor.

‘Pipeliningsuggests that the transfers after the first transfer happen before the first transfer has arrived at the processor. ‘Pipleline burst cachewas developed as an alternative to asynchronous cache and synchronous burst cache.

  • Produk Naam : UMC Sync Cache Module 256KB (Version : 1.8)
  • Onderdeel nommer : LM 2MV 94V-0
  • Vervaardiger : UMC
  • Land van Vervaardiging : Taiwan
  • Boujaar/week : 1996/39
  • Datakapasiteit : 256KB
  • Pin count : 80pins
  • Kenmerke : KUS(Kas Op 'n Stok), Pyplyn Burst Cache, additional L2 Cache, SRAM
  • Spanning : 3.3V
  • Chip Composition : [UM61(L)3232AF-7 9641S MM4X52] ✕ 2 + [UM61(m)256s-15 9549D RB1121] ✕ 1

 

Sync Cache Module Slot (Pipeline_Burst_Cache Moduel Slot)

UMC Sync cache module installed on Soyo mainboard slot

Kommentaar (2)

You forgot the most common colloquial term for these: COAST (Kas Op 'n Stok) :P

I just know the term, KUS(Kas Op 'n Stok).
Thank you for your kind comment.

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