Keteroki I Runga Rakau – DeviceLog.com https://www.devicelog.com/mi/ device, part, spec Mon, 25 Jul 2022 04:37:45 +0000 mi hourly 1 https://wordpress.org/?v=6.6.2 UMC Tukutahi Keteroki Kōwae 256KB (Pipeline Burst Cache, Ko te takutai) https://www.devicelog.com/mi/memory/sram/umc-sync-cache-module-256kb-pipeline-burst-cache/ https://www.devicelog.com/mi/memory/sram/umc-sync-cache-module-256kb-pipeline-burst-cache/#comments Sat, 05 Jan 2013 13:27:32 +0000 https://www.devicelog.com/?p=535-mi UMC Sync Cache Module 256KB Frontside (Pipeline Burst Cache)

UMC Sync Cache Module 256KB Backside (Pipeline Burst Cache)

He maha nga papa matua, tautokohia te PTM pentium wawe, i te nuinga o te wa he maramara mahara keteroki tukutahi hei keteroki PTM L2. Tenei kōwae keteroki tukutahi(Ko te takutai; Keteroki I Runga Rakau) he kōwae mahara waho whakamahia hei keteroki PTM L2 taapiri. Ka whakanuia e ia te mahi o te tukatuka i te wa e tatari ana te kaitukatuka mo nga tohutohu, raraunga ranei. L2 cache is used for operating closer to the theoretical limit of the microprocessor.

'Te mahi paipa’ e whakaaro ana ko nga whakawhitinga i muri i te whakawhitinga tuatahi ka puta i mua i te taenga mai o te whakawhitinga tuatahi ki te tukatuka. 'Pipleline pakaru keteroki’ was developed as an alternative to asynchronous cache and synchronous burst cache.

  • Ingoa Hua : UMC Tukutahi Keteroki Kōwae 256KB (Putanga : 1.8)
  • Nama Wahi : LM 2MV 94V-0
  • Kaihanga : UMC
  • Whenua hanga : Taiwan
  • Hanga Tau/Wiki : 1996/39
  • Raraunga Raraunga : 256KB
  • Tatau titi : 80titi
  • Ngā āhuatanga : Ko te takutai(Keteroki I Runga Rakau), Pipeline Burst Cache, taapiri L2 Keteroki, SRAM
  • Ngaohiko : 3.3V
  • Tito maramara : [UM61(L)3232AF-7 9641S MM4X52] ✕ 2 + [UM61(m)256s-15 9549D RB1121] ✕ 1

 

Sync Cache Module Slot (Pipeline_Burst_Cache Moduel Slot)

UMC Sync cache module installed on Soyo mainboard slot

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